TM 11-5805-356-34-1
c. Dc Amplifier A2Q10-A2Q11.
quency is transmitted before the carrier is sup-
(1) Base bias for transistor A2Q11 is de-
pressed when operating half-duplex. The delay is
veloped by voltage divider A2R35-A2R36. When
introduced by the buildup of charge across capac-
AND gate A2Q12-A2Q13 is nonconducting, the
itor A2C13 sufficient to cut off AND gate tran-
base bias forward-biases transistor A2Q11 so that
sistor A2Q13, A mark input is represented by a
it produces a voltage drop across collector load
circuit closure at SEND input jack J1 or J2, and
resistors A2R37 and A2R38. The voltage drop
results in the charging of capacitor A2C13
across resistor A2R38 supplies the base bias volt-
through resistor A2R42, contacts 1 and 2 of
age to transistor A2Q10, forward-biasing the
switch S3A, contacts 7 and 8 of switch SIB
transistor. With A2Q10 conducting, the cathode
(contacts 4 and 6 of switch S4A are in parallel
of diode A2CR5 is returned to the + 18-volt bus
through the transistor, back-biasing the diode
of switch S2A, jack J1, resistor R20, jack J2, and
and removing it from the circuit,
the +108-volt supply. A space input results in
the interruption of this charge path at the SEND
(2) When AND gate A2Q12-A2Q13 is en-
jack in use. When the charging path is broken,
abled and conducts, the resultant voltage drop
the voltage that has built up across capacitor
across resistor A2R39 reverse-biases transistor
A2C13 turns on transistor A2Q14, causing a
A2Q11, cutting the transistor off, With transis-
rapid discharge of the capacitor. Resistors A2R41
tor A2Q11 cut off, transistor A2Q10 is no long-
and A2R42 form the base biasing network to for-
er forward-biased and also cuts off. The cathode
ward-bias the transistor so long as the capacitor
of diode A2CR5 is now returned to the 0 volt
retains a charge while the capacitor charge path
but through resistor A2R35, maintaining a for-
is open, The time constant of the capacitor charg-
ing path is such that a voltage sufficient to turn
preventing the multivibrator from being set,
on transistor A2Q13 is developed across capacitor
A2C13 if an uninterrupted mark input is applied
to the SEND jack for more, than 2.5 seconds. For
the circuit to operate in this manner, switch S3
a. Signal Detector A3CR6-A3CR7. The signal
must be at NORM, When this switch is at REC,
detector samples the received signal developed
capacitor A2C13 charges through resistor A2R42,
across emitter load resistor A3R17 of the receive
contacts 1 and 8 of the switch, and the + 18-
circuit and develops a dc voltage across capacitor
volt supply to a level sufficient to assure that
A3C12 proportional to the amplitude of the sig-
transistor A2Q13 can conduct, resulting in sup-
nal. Negative-going portions of the signal are
pression of the carrier if switch S5 is at 2W.
coupled through diode A3CR6 to build up a dc
When switch S3 is at SEND, capacitor A2C13
charge on capacitors A3C9 and A3C12. During
charge path is left open, resulting in the carrier-
positive-going portions of the signal, rectifier A3-
suppression feature being defeated.
CR7 causes capacitor A3C9 to discharge, while
b. AND Gate A2Q12&A2Q13. AND gate A2-
the charge on capacitor A3C12 is maintained
Q12-A2Q13 is enabled when both constituent
through the blocking action of rectifier A3CR6.
transistors are forward-biased. Transistor A2Q12
In this fashion, a charge gradually builds up on
is forward-biased when the multivibrator in the
capacitor A3C12 proportional to the amplitude of
break-in circuit is reset (para 2-7); transistor
the incoming signal, The resultant dc voltage is
A2Q13 is forward-biased when capacitor A2C13
applied to the input of differential amplifier
has built up a sufficient charge (a above), With
A3Q13-A3Q14.
both transistors forward-biased, a current flows
b. Differential Amplifier A3Q13-A3Q14. The
through the AND gate, developing a voltage
voltage developed across capacitor A3C12 is ap-
drop across resistors A1R28 in the send circuit
plied to the base of transistor A3Q14, As the
voltage builds up due to increasing signal
resistor A1R29 biases gated amplifier A1Q6 so
strength, conduction through transistor A3Q14
that the output of the send circuit is suppressed.
increases, developing an increased voltage drop
The voltage drop across resistor A2R39 provides
across coupling resistor A3R41. This increased
the input signal to dc amplifier A2Q10-A2Q11
voltage drop decreases conduction in transistor
which, in turn, supplies a signal to disable the
A3Q13, causing the collector voltage to become
less positive. The negative-going voltage is ap-
suppressed. This feature assures that the break-in
plied to the base of electronic switch A3Q12. Re-
circuit cannot be actuated while the TH-22/TG is
sistor A3R42 is the collector load for transistor
operating half-duplex in the receive mode.