TM 11-5805-356-34-1
d Discriminator Driver A3Q5. This circuit
ary. The secondary signal is applied to the base
provides discriminator transformer Z2 with a
of transistor A3Q1 through coupling capacitor
constant-amplitude fsk signal. The input signal
A3C2. The output signal of emitter follower A3-
from coupling capacitor A3C8 is applied through
Q1, developed across emitter resistor A3R5, is
current-limiting resistor A3R18, developed across
applied through coupling capacitor A3C3 to
base resistor A3R19, and fed to the base of tran-
limiter-amplifier A3Q2. Resistors A3R2, A3R3,
sistor A3Q5. The output signal of transistor A3-
and A3R4, together with capacitor A3C1, form a
Q5 is developed across the primary windings of
biasing and decoupling network. When four-wire
home copy is strapped in, the transmitted vf sig-
discriminator transformer Z2. Resistor A3R20
nal is coupled through resistor A3R1 to the re-
provides emitter bias for transistor A8Q5.
ceive circuit.
e. Discriminator Transformer Z2.
b. Limiter-Amplifier A3Q2-A3Q3.
(1) The two primaries of discriminator
(1) Limiter-amplifier A3Q2-A3Q3, a two-
stage limiter-amplifier, removes amplitude varia-
connected across each winding. One winding is
tions from the input signal. The input signal is
tuned to a frequency slightly above the mark
coupled to transistor A3Q2 through capacitor
frequency, and the other is tuned to a frequency
A3C3 and resistor A3R59. Large input signals
are clipped on both half-cycles by the combina-
windings are series-connected in the collector cir-
tion of diode A3CR2 and the transistor A3Q2
cuit of the discriminator driver. Since, at reso-
base-emitter junction of transistor A3Q2. Output
nance, voltage is at a maximum across a parallel
of transistor A3Q2, developed across collector
tuned circuit, the further the input frequency is
load resistor A3R9, is direct-coupled to transistor
from resonance, the lower in amplitude is the
A3Q3, where additional amplification takes
voltage across the primary. While the input volt-
place; transistor A3Q3 output is developed at the
age to the transformer varies in frequency, the
transistor collector. Stabilizing feedback voltage
output voltage, due to the action of the tuned
is developed across unbypassed emitter resistor
circuits, varies in amplitude.
A3R16 and coupled through resistor A3R7 to the
(2) The input voltage to the transformer is
base of transistor A3Q2. Additional feedback is
applied to both primary windings. However, the
developed in the emitter circuit of transistor A3-
mark frequency develops a greater voltage across
Q2 by resistors A3R10 and A3R12.
the secondary winding at terminals 7 and 10 than
(2) The SENS strapping provides two levels
at terminals 3 and 6. The space frequency de-
of gain. For low sensitivity, the SENS strap is
velops a greater voltage across the secondary
connected between terminals 2 and 3, so that re-
winding at terminals 3 and 6 than at terminals
sistor R12 is not bypassed, and produces a de-
9 and 10. The output voltages from both wind-
generative feedback voltage that reduces the gain
ings are applied to the discriminator.
of transistor A3Q2. For high sensitivity, the strap
f. Discriminator ASCR7-A3CR8, A3CR9-A3-
is connected between SENS terminals 1 and 2.
CR10.
Capacitor A3C5 bypasses mister A3R12, prevent-
(1) The discriminator transformer output is
ing it from producing degenerative feedback and
applied to discriminator diodes A3CR7-A3CR8
increasing the gain of transistor A3Q2. Capacitor
and A9CR9-A3CR10, where the amplitude-vary-
A3C6 provides a high frequency dropoff to pre-
ing signals are rectified and developed across an
vent oscillation at high frequencies. Resistors
internal capacitor between terminals 5 and 11 of
A3R8 and A3R6, together with capacitor, A3C4,
provide base biasing and decoupling. Capacitor
minals 9 and 11 for mark signals.
A3C7 bypasses emitter resistor A3R15.
(2) These voltages are added together alge-
c. Emitter Follower A3Q4. This circuit matches
braically, and the sum is added to the voltage de-
the high output impedance of amplifier A3Q3 to
veloped by voltage divider A3R21 and A3R22.
the low input impedance of discriminator driver
The resultant voltage is applied to the base of
A3Q5 and the input to the threshold circuit. The
emitter follower A3Q6. The output voltage is
input signal to the emitter follower is direct-
approximately +6 volts for space output, and ap-
coupled to the base of transistor A3Q4, and the
proximately +18 volts for mark output,
output signal is developed across emitter resistor
(8) BIAS ADJ resistor R14 determines the
A8R17. This output signal is applied directly to
the input of the threshold circuit, and through
space voltages, providing positive on-off opera-
coupling capacitor A3C8 to the input of discrim-
tion of transistor A3Q6. The output of transistor
nator driver A3Q5.